Circuit arrangement for electronic gain/control, in particular electronic volume control circuit

ABSTRACT

The invention describes an electronic volume control circuit which can be manufactured in integrated circuit form, can be operated at a low battery voltage, has satisfactory input signal compatibility and comparatively low noise. A transistor differential amplifier is provided the emitter lead of which includes a transistor which passes the direct current and the signal current. A negative-feedback path is provided from that collector terminal of the differential amplifier which is not used as a signal output to the input of the transistor included in the emitter lead.

United States Patent Bockelmann et al.

[ June 24, 1975 CIRCUIT ARRANGEMENT FOR 3.684.974 8/l972 Solomona......................... 330/30 1) ELECTRON] GAIN CONTROL IN 3,727,146 4/[973 Hughes....... 330/29 PARTICULA; ELECITRONIC vwME 3,731,215 5/1973 Peil et al. 330/29 3,790.896 2/1974 Shimizu et al. 330/29 CONTROL CIRCUIT [75] Inventors: Paul Bockelmann, Halstenbek; Primar y Examiner-Stanley D. Miller, Jr. z fi f Hamburg Attorney, Agenl, 0r Firm--Frank R. Trifari; Henry I.

0t 0 emany Steckler [73] Assignee: U.S. Philips Corporation, New

York, NY. [22] Filed: Nov. 29, I973 [57] ABSTRACT [2]] Appl NO; 420 268 The invention describes an electronic volume control circuit which can be manufactured in integrated cir- 0 cuit form, can be operated at a low battery voltage,

[ g pp y Data has satisfactory input signal compatibility and compar- Dec. 21, 1972 Germany 2262580 atively low noise. A transistor differential amplifier is provided the emitter lead of which includes a transis- [52] US. Cl 330/29; 330/30 D tor which passes the direct current and the signal cur- [51] Int. Cl H031 3/30; H03f 3/68 rent. A negative-feedback path is provided from that [58] Field of Search 330/29, 30 D, 26. 28 collector terminal of the differential amplifier which is not used as a signal output to the input of the transis- [56] References Cited tor included in the emitter lead.

UNITED STATES PATENTS 6 C 2 D 3,474,347 l0/1969 Praglin et =11 330/30 D CIRCUIT ARRANGEMENT FOR ELECTRONIC GAIN/CONTROL, IN PARTICULAR ELECTRONIC VOLUME CONTROL CIRCUIT The invention relates to a circuit arrangement for electronic gain control, in particular an electronic volume control circuit, including at least one transistor differential amplifier in the emitter lead of which a transistor (a signal transistor) is connected which carries a direct current and a signal current, the gain control being effected by means of a control voltage applied to the bases of the differential amplifier whilst the output signal can be derived from one of the two collector outputs.

Such a circuit arrangement is described in German Pat. Application No. 2,060,l92 laid open to public inspection. A disadvantage of the known circuit arrangement is that comparatively much noise is produced and that a variation in gain entails a variation of the direct voltage at the output.

The latter disadvantage is obviated in the circuit arrangement shown in FIG. I which is also described in the said German Pat. Application No. 2,060,l92 (FIG. 3). It comprises two cross-connected transistor differential amplifiers, i.e. four transistors T to T which each have one electrode in common which each of the three remaining transistors (for example the transistor T, has the emitter in common with the transistor T the collector in common with the transistor T and the base in common with the transistor T The interconnected collectors of the transistors T and T are connected to a positive operating voltage via a resistor R from which the output voltage can be derived. Similarly the interconnected collectors of the transistors T and T are connected to the operating voltage via a resistor R The interconnected emitters of the transistors T and T are connected to the collector of a transistor T the emitter of which is connected to earth via a resistor R and to the base of which a positive direct voltage is applied, for which reason the transistor T hereinafter is also referred to as direct-current transistor. Similarly the common emitter lead of the transistors T and T includes a transistor T, having an emitter resistor R the resistance of which is equal to that of the resistor R To the base of the latter transistor is applied the sum of a signal voltage 1.4 and a direct voltage U exactly equal to the direct voltage applied to the base of the transistor T The transistor T is hereinafter also referred to as signal transistor. By means of a control direct voltage u applied between the interconnected bases of the transistors T and T and the intercom nected bases of the transistors T and T the amplification of the signal u applied to the base of T can be controlled.

In this circuit arrangement the direct voltage at the output is independent of the control direct voltage. However, the circuit arrangement has the disadvantage that with a given battery voltage and input signal compatibility the amplification of the signal u is limited.

To illustrate this disadvantage it is assumed that the direct voltage U 3.6 volts and the amplitude of the signal it 0.4 volts and that the maximum gain obtained when the entire signal current of the transistor T flows through the transistor T and the resistor R which gain is equal to the ratio Rn/R is 3. In this case the voltage across the resistor R is about 4 volts and the voltage across the resistor R thrice this voltage,

i.e. 12 volts. Considering that the collector-emitter voltages of the transistors T and T must at least be such as to prevent their collector-base diodes from becoming conducting it will be appreciated that the operating voltage must exceed l6 volts. it is not possible to reduce the direct voltage at the inputs of the transistors T and T whilst retaining the signal amplitude, because the distortion factor of such a circuit increases with increase in the amplitude of the alternating voltage compared with the direct voltage. Hence the direct voltage in general is selected so that the alternatingvoltage amplitude is less than about 40 percent of the direct voltage.

It is an object of the present invention to provide a circuit arrangement of the type referred to such that with a small input signal and a given low battery voltage a high gain is obtainable without the input being overdriven in the case of a large input signal and reduced gain.

According to the invention this is achieved in that negative feedback operative at least for the signal frequency is provided from the other collector output to the signal transistor. The effect of this step is based on the fact that the negative feedback is increased when the gain is reduced by applying a suitable control voltage, and conversely, because the signal amplitude at the other collector terminal, which does not serve as an output, varies in a sense opposite to the variation of the signal amplitude at the output. If for example the control voltage is chosen so that the entire signal current flows through the output collector resistor, the signal voltage at the other collector output and hence the negative feedback for the signal transistor is zero, resulting in a high signal amplification. If, however. the control voltage is chosen so that as to give rise to a low gain, the negative feedback is large and noise is low.

FIG. 1 represents the prior art gain control circuit while,

FIG. 2 shows a gain control circuit which embodies the invention.

An embodiment of the invention is characterized in that it comprises two cross-connected differential amplifiers which each include a transistor in the emitter lead, one of these transistors (direct-current transistor) carrying a direct current and the other one (signal transistor) carrying a corresponding direct current and the signal current. This ensures that the direct voltage at the output is independent of the selected signal amplification.

in the case of pure alternating-current negative feedback the loop amplification may be as large as desired. However, a circuit arrangement using pure alternatingcurrent negative feedback cannot readily be manufactured in integrated-circuit form, especially at low frequencies with a resulting additional direct-current negative feedback. If in this case the gain in particular in the negative-feedback branch is made too large, at a maximum signal amplification the direct current of the direct-current transistor may cut off the signal transistor via the negative-feedback branch. In the embodiment of the invention this may be prevented in that the condition VR /R 1 is satisfied, where V is the directvoltage gain in the negative-feedback branch, R is the resistor at the collector output and R is the emitter resistor of the directcurrent transistor.

In the embodiment of the invention the negative feedback may be provided via a direct-voltage amplifier which has a low differential output resistance and the output of which is connected via a resistor to the emitter of the signal transistor.

Further advantages and features of the circuit arrangement according to the invention will now be described by way of example with reference to the em bodiment shown in FIG. 2.

Referring now to FIG. 2, the circuit arrangement shown may for example be used as an electronic volume control circuit in the low-frequency part of the broadcast receiver. It includes two cross-connected transistor differential amplifiers comprising transistors T, to T, which each have one electrode in common with each of the three remaining transistors (for example T, has the emitter in common with T the collector in common with T and the base in common with T The lead by which the collectors of the transistors T and T, are interconnected and from which the output signals are derived is connected via a resistor R, of 10 k (1 to the positive terminal of a voltage supply source. The interconnected collectors of the transistors T and T are connected to the positive terminal of the supply source via the series combination of a resistor R of 10 k G and a transistor D which is connected as a diode and the operation of which will be set out hereinafter. The interconnected emitters of the transistors T, and T are connected to the collector of a transistor T the emitter of which is connected to earth via a resistor R of IO k G. and to the base of which a direct voltage U is applied.

The interconnected emitters of the transistors T and T are connected to the collector of a transistor T, the emitter of which is connected to earth via the series combination of a resistor R of 3.3 k Q and a resistor R, also of 3.3 k (l and to the base of which is applied the sum of a signal voltage and a direct voltage of the same value as the direct voltage applied to the base of the transistor T Disregarding the facts that in the circuit arrangement shown in FIG. 2 the collectors of the transistors T, and T are connected to the positive operating voltage via the series combination of a resistor R and a diode D, and that the emitter of the transistor T is connected to earth through the series combination of two resistors R and R the circuit so far described otherwise entirely corresponds to the circuit arrangement shown in FIG. 1.

Additionally, however. the other collector output, i.e. the junction point of the collectors of the transistors T and T is connected to the base of a transistor T-,, which is the only transistor in the circuit arrangement which is of the p-n-p type, all the remaining transistors being of the n-p-n type. The emitter of this transistor is connected to the positive voltage supply terminal via a resistor R of 10 k (1. Because the voltage drop across the base-emitter path of the transistor T is substantially equal to the voltage drop across the diode D,, the voltage drop across and since the resistor R has the same value (l0 k G) as the resistor R the current through the resistor R. also are exactly equal to the voltage drop across and the current through the resistor R respectively. The collector of the transistor T is connected to the base of a transistor T, the collector of which is connected to the emitter of the transistor T The emitter of the transistor T is connected to earth via the series combination of a resistor R of 6.8 k (2 and a diode D which similarly to the diode D, is constituted by a transistor having its collector and base short-circuited. The emitter of the transistor T is also connected to the base of a transistor T the emitter of which is connected to the junction point of the resistors R and R and the collector of which is connected to the positive supply voltage terminal. In this part of the circuit arrangement also the provision of the diode D ensures that the voltage drop across the resistor R is equal to the voltage drop across the resistor R,.

In order to explain the operation of the circuit arrangement according to the invention it will first be assumed that the transistors T, to T, have a control voltage u such applied to their bases that substantially the entire current of the signal transistor T flows through the transistor T the resistor R and the diode D,, only a small part of the current flowing through the resistor R, connected to the output. Thus substantially the entire direct current of the direct-current transistor T flows through the transistor T, and the resistor R, so that across the resistor R, a direct-voltage drop is produced which is about equal to the direct voltage U applied to the base of the transistor T because R and R, have equal values. Because the direct current flowing through the transistor T is equal to the direct current flowing through the transistor T an equal direct volt age is set up across the resistor R, but in addition a sig' nal portion corresponding to the signal voltage u. The voltage across the resistor R is amplified by the transistors T-,, T, and T and is fed back via the resistor R to the emitter of the transistor T resulting in negative feedback which ensures that at the given values of the resistors R and R, to R the voltage across the resistor R is equal to the voltage at the input of the transistor T Consequently with the current distribution described the circuit arrangement shown in FIG. 2 in re spect of the amplification of the direct and alternating voltages applied operates similarly to a circuit arrangement as shown in FIG. 1 in which the resistors R,, to R have equal values.

At this setting of the current distribution at which the gain is small the large negative feedback provides a large input-signal compatibility and a particularly low noise voltage at the output.

However, when the control voltage u is chosen so that the entire current of the transistor T, can flow through the transistor T and the resistor R, whilst the direct current of the transistor T flows through the transistor T the resistor R and the diode D,, the signal portion at the collectors of the transistors T and T is zero, so that the signal voltage fed back degeneratively by the negative-feedback amplifier T T and T to the emitter of the transistor T is zero as well.

With this current distribution the potential at the emitter of the transistor T remains constant owing to the small differential emitter output resistance, whereas the full alternating voltage portion is applied to the emitter of the transistor T Thus at this setting the effect in respect of signal amplification is the same as if the resistor R were directly connected to earth: in this case also the signal voltage amplification is equal to the ratio R1/R5, i.e. 3.

On the other hand, at this setting the direct current flowing through the resistor R, remains unchanged, for the direct current of the transistor T produces a direct voltage across the resistor R which is amplified ac cording to the ratio R /R and is applied to the emitter of the transistor T The resistor R of 3.3 k (I has a value such that the difference between the voltages at the emitters of the transistors T and T causes a current to flow through the resistor R and the transistor T which is equal to the direct current flowing through the transistor T The higher the voltage at the emitter of the transistor T,,, which voltage is the product of the voltage U at the base of the transistor T multiplied by the quotient R,R-,/R R the smaller the resistor R is to be to ensure that the direct current flowing through the transistor T is equal to the direct current flowing through the transistor T if the direct voltage at the emitter of the transistor T were higher than the direct voltage at the base or at the emitter of the transistor T the transistor T would be cut off. The quotient R R /R,R must consequently be less than i, and preferably a value not too near 1 is used, because otherwise spreads of the resistors greatly effect the direct current (in the embodiment shown the quotient is 0.68).

The direct current flowing through the transistor T flows to earth via the resistors R and R At the same time the resistor R passes a direct current which is supplied by the transistor T, and has a value such that the direct voltage across the resistor R is equal to the direct current across the resistor R The sum of the resistances of R and R must at most be equal to the resistance of R Moreover, R must be smaller than R,; advantageously R is equal to R /2.

Because the direct current flowing through the transistor T is equal to the direct current flowing through the transistor T with this current distribution the direct-voltage drop across the resistor R is not higher than with the aforementioned current distribution. In the case of a direct voltage U of 3.6 volts and an amplitude of the signal voltage u of 0.40 volts, the maximum voltage drop across the resistor R will be 3 X 0.4 volts 3.6 volts 4.8 volts. To this voltage are added 0.4 volts 3.6 volts at the emitter of the transistor T so that the circuit arrangement can be operated with a signal amplification of 3 at an operating voltage of less than volts, whereas in a circuit arrangement as shown in FIG. 1 at this amplification and these voltages a direct voltage greater than 16 volts is required, as has been set out at the beginning of this specification. In the case of a direct voltage of 3.6 volts with high grain (in this embodiment a maximum gain of 3) an output signal having a signal amplitude of 1.4 volts is obtainable. With a low gain setting an input signal having a signal amplitude of 1.4 volts can be handled.

With the said current distribution the noise is increased relative to the firstmentioned current distribution, however, it is less important because at this setting the signal amplitudes at the output are larger. Thus, the circuit arrangement according to the invention not only provides a reduction of the operating voltage with equal gain but also result in improved noise properties.

What is claimed is:

l. A gain control circuit comprising at least a first differential amplifier including first and second coupled transistors each having emitter, base, and collector electrodes; a signal transistor means coupled to said emitters for carrying direct and signal currents; means coupled to said bases for applying a gain control voltage thereto', means coupled to one of said collectors for deriving an output signal therefrom; and means for negatively feeding back at least said signal from the remaining collector to said signal transistor.

2. A circuit as claimed in claim I further comprising a second differential amplifier including third and fourth coupled transistors, each being cross coupled to said first and second transistors and including an emitter electrode; and a direct current transistor coupled to said third and fourth transistor emitters and carrying a direct current substantially equal to said direct current in said signal transistor.

3. A circuit as claimed in claim 2 wherein said feedback means conveys direct current in addition to said signal, and further comprising a first resistor coupled to said remaining collector; a second resistor coupled to the emitter of said direct current transistor; and wherein the condition VR /R l is satisfied, wherein V is the direct voltage gain of said feedback means, and R and R are the resistances of said first and second transistors respectively.

4. A circuit as claimed in claim 1 wherein said feedback means comprises a direct voltage amplifier having an output with a low differential output resistance, and further comprising a third resistor coupled between said feedback means amplifier and the signal transistor emitter.

5. A circuit as claimed in claim 2 wherein said feedback means comprises a direct voltage amplifier having an output with a low differential output resistance and further comprising means for insuring that at the direct-voltage conditions which are produced when the current of the direct-current transistor is caused to flow completely through the other collector output the direct current flowing through the signal transistor is equal to the direct current flowing through the direct current transistor comprising a third resistor of a se lected value coupled between said feedback means amplifier and the signal transistor emitter.

6. A circuit as claimed in claim 5 further comprising a fourth resistor parallel coupled to the direct voltage amplifier and having a value such that the sum of the resistances of the fourth resistor and of the third resistor is smaller than the second resistor. 

1. A gain control circuit comprising at least a first differential amplifier including first and second coupled transistors each having emitter, base, and collector electrodes; a signal transistor means coupled to said emitters for carrying direct and signal currents; means coupled to said bases for applying a gain control voltage thereto; means coupled to one of said collectors for deriving an output signal therefrom; and means for negatively feeding back at least said signal from the remaining collector to said signal transistor.
 2. A circuit as claimed in claim 1 further comprising a second differential amplifier including third and fourth coupled transistors, each being cross coupled to said first and second transistors and including an emitter electrode; and a direct current transistor coupled to said third and fourth transistor emitters and carrying a direct current substantially equal to said direct current in said signal transistor.
 3. A circuit as claimed in claim 2 wherein said feedback means conveys direct current in addition to said signal, and further comprising a first resistor coupled to said remaining collector; a second resistor coupled to the emitter of said direct current transistor; and wherein the condition VR2/R9 <1 is satisfied, wherein V is the direct voltage gain of said feedback means, and R2 and R9 are the resistances of said first and second transistors respectively.
 4. A circuit as claimed in claim 1 wherein said feedback means comprises a direct voltage amplifier having an output with a low differential output resistance, and further comprising a third resistor coupled between said feedback means amplifier and the signal transistor emitter.
 5. A circuit as claimed in claim 2 wherein said feedback means comprises a direct voltage amplifier having an output with a low differential output resistance and further comprising means for insuring that at the direct-voltage conditions which are produced when the current of the direct-current transistor is caused to flow completely through the other collector output the direct current flowing through the signal transistor is equal to the direct current flowing through the direct-current transistor comprising a third resistor of a selected value coupled between said feedback means amplifier and the signal transistor emitter.
 6. A circuit as claimed in claim 5 further comprising a fourth resistor parallel coupled to the direct voltage amplifier and having a value such that the sum of the resistances of the fourth resistor and of the third resistor is smaller than the second resistor. 